Semiconductor Inspection

The strict process requirements and the very small physical dimensions involved in semiconductor processing typically demand sophisticated inspection systems. There is a broad set of inspection requirements for semiconductor inspection in general, with most inspection system using some combination of optical, laser and electron beam techniques.

The use of infrared wavelength light adds some additional capability for semiconductor inspection applications. Most semiconductors are transparent to infrared light and this allows the potential for inspection systems where bulk material defects as well as some surface defects can be detected simultaneously. The size of defects that can be detected is limited by the illuminating wavelength. For example, light with wavelength in the 2um region provides detectability in the 0.5um region.

Phoseon has applied its SLM (Semiconductor Light Matrix) technology to high intensity Infrared light sources.  These sources, when combined with a patent-pending configuration of optics, sensors and software, produces a technology known as “Si-Thru.” Using this technology, Phoseon’s MX Series of infrared inspection systems, provides the capability to inspect through the silicon in applications such as MEMS devices inspection, bare wafer inspection, solar cells, and bonded wafer inspection.

MEMS Inspection

The term Micro-Electro-Mechanical Systems (MEMS) refers to a combination of mechanical elements (sensors, actuators etc.) and electronics on a common silicon substrate, implemented through microfabrication technology. While typically the electronics are fabricated using standard integrated circuit processes, the micromechanical components are fabricated using one of several "micromachining" processes that either selectively etch away parts of the silicon or add new structural layers to form the devices.

Large application for MEMS devices include:

• Automotive sensors, e.g., accelerometers for airbag deployment
• Thermal ink jet heads
• Digital light processing devices, e.g., Texas Instruments’ DLP components

Phoseon’s MX systems are particularly well-suited for applications where inspection of the mechanical element and the associated die-level hermetic seal are required to assure operation of the device and to better assure long term reliability of the end system.

Bare Wafer Inspection

The production of quality bare silicon wafers is key for the subsequent processing and metallization steps that lead to integrated circuits. As wafer sizes have continued to increase, feature sizes have decreased and with the increasing use of wafer thinning processes, the need for increased vigilance in bare wafer inspection has become critical.

While most volume macro inspection systems in the bare wafer market can scan the top and bottom surfaces or the wafer edge, they are not capable of imaging into the silicon itself. Phoseon’s MX Series products can visualize defects on all surfaces as well as visualize potentially harmful “buried” macro defects.

Bonded Wafer/SOI Inspection

Wafer bonding is used to join two flat mirror-polished wafer surfaces. Appropriate polishing methods and control of the surface chemistry enables a variety of solids with different structures (amorphous, polycrystalline, single crystals), crystallographic orientation, and lattice constants to be bonded together. Indeed, wafer bonding allows for materials combinations that are simply not possible to achieve using standard epitaxial growth processes.

Many variations of wafer bonding are applied in microelectronics, MEMS, micro-optoelectromechanical systems (MOEMS) and advanced wafer-level packaging. Some of the most widely used wafer bonding techniques include anodic bonding, direct (fusion) bonding, eutectic and thermocompression bonding, as well as temporary bonding for handling brittle compound semiconductor wafers. The choice of bonding method depends on the initial substrate and the final application.

Silicon on insulator (SOI) is a specific bonded wafer semiconductor technology that produces higher-performing, lower power devices than traditional bulk silicon techniques. SOI works by placing a thin, insulating layer (usually silicon oxide or glass) between a thin layer of silicon and the silicon substrate. This process helps reduce the amount of electrical charge that the transistor has to move during a switching operation, thus making it faster and allowing it to switch using less energy. SOI chips can be as much as 15 percent faster and use 20 percent less power than today's standard chips.

For bonded wafers, the ability to image the bond interface is key to allowing detection of defects or discontinuities resulting from the bonding process or detection of any potential inclusions that might affect bond integrity. The MX Series of Infrared inspection systems provides and excellent platform for bond area imaging – especially where imaging through silicon or related semiconductor materials is required.

	Phoseon’s MX Series of infrared inspection systems incorporate infrared (IR) semiconductor light sources with optical systems and manual or automatic material handlers to serve the inspection needs of both electronics manufacturers and R&D labs. Learn more about Phoseon MX products.